A Look at PCI Express - PAGE 1

Introduction

The venerable PCI Bus has been one of the bastions in PC connectivity for roughly a decade now. The limitations of the PCI bus was first highlighted with the introduction of the ubiquitous AGP port back in the summer of 1997.

The main advantages of AGP are its increased bus speed / bandwidth as well as its point to point architecture. A point to point protocol means that AGP has its own path way to communicate with the processor as well as one to the memory whereas every device on the PCI bus had to share the 133 MB/s worth of bandwidth allocated to it. Both the AGP and PCI Bus are based on a 32 bit bus. AGP being clocked at 66 Mhz versus 33 for PCI had double the bandwidth (266 MB/s) in its first iteration. With the ability to transfer data multiple times per clock cycle, AGP in recent times (currently at a maximum of 8x, has ~2100MB/s of bandwith).

With a bevy of high speed I/O devices today outside of the graphics card including SATA / ATA150 (150 MB/s), Gigabyte Ethernet (125 MB/s), 1394B (100 MB/s) it is easy to see that any one of these devices alone can completely saturate the PCI bus completely. Nearly everything else in the PC has scaled in one way or another in the past decade except for the PCI bus. With the exception of PCI-X (a 64 bit, 66 Mhz, server solution), the PCI bus has stayed relatively stagnant while many of the subsystems have been scaling up (frontside bus speed, memory, AGP). Fortunately, this is about to change with the advent of PCI Express.

PCI Express

PCI Express (not to be confused with PCI-X) is the upcoming replacement for both PCI and AGP. A couple of main points about PCI Express

• While the classic PCI Bus is based upon a parallel architecture, PCI Express is serial based, drastically reducing pin count.
• It is a point to point protocol much like AGP. Devices do not share bandwidth